Gasgoo Munich-Data shows nearly 43.8 billion yuan flooded into the domestic embodied AI sector in the first half of 2026 (as of June 12), with over half of that capital flowing into fields related to the "embodied brain."
Meanwhile, NVIDIA released the Halos robot safety system and the GR00T humanoid robot reference design, Qualcomm launched the Yuelong IQ10 series, UBTECH and Maxxiri formed a joint venture named Xixuan Chuangzhi, and Li Auto unveiled its self-developed Mahe M100 chip. Industry signals are coming thick and fast.
Yet, a question worth pondering remains: When everyone talks about "building chips," do we truly understand what kind of chips embodied AI actually needs?
Gasgoo Auto notes that regarding these issues, the industry is currently wrestling with at least three core debates: the trade-off between computing power and real-time performance, how to divide labor between the "brain" and the "cerebellum," and whether in-house or general-purpose solutions will prevail.
Consensus on these debates is nowhere near reached. It is precisely this uncertainty that forms the true backdrop of the current embodied AI chip industry.
Beyond Compute: The "Real-Time" Imperative for Embodied AI Chips
The most dominant narrative in the current embodied AI chip space is the "compute race."
NVIDIA's Jetson Thor delivers 2,070 FP4 TFLOPS of AI performance, Qualcomm's Yuelong IQ10 series hits 700 TOPS, and Black Sesame's A2000X leads with an equivalent 1,000 TOPS.
Image Source: NVIDIA
These figures appear frequently in product launches and media reports, shaping the public's basic framework for understanding chip capabilities.
But whether this framework is complete is a matter of debate within the industry.
A frequently cited technical reality is this: Embodied AI and cloud AI have fundamentally different chip requirements. Cloud-based large AI model inference chases "throughput"—processing as much data as possible per unit of time. Robots executing precise operations, however, require "latency determinism"—the response time for every command must be stable and predictable.
The importance of the latter is often underestimated in the current compute-focused narrative.
Take tactile feedback. When a robot's finger touches an object, the force signal from sensors must be processed and fed back to the joint motors within milliseconds. Otherwise, the robot risks dropping the object or crushing it. The stringent requirements for interrupt latency in this closed loop are not directly reflected in TOPS figures.
The proposal of a "big brain, small brain" division of labor is a direct response to this issue.
The industry consensus is this: The "brain" handles high-level perception, planning, and multimodal understanding—tasks with heavy computation but relatively relaxed real-time needs. The "cerebellum" manages motion control and real-time feedback—tasks with lighter computation but extreme demands on latency and power efficiency. Their chip requirements are starkly different.
Song Jiqiang, director of Intel Labs China, has stated publicly that now is not the best time to launch dedicated robot chips. VLA models face capability ceilings, and the adaptability of general-purpose chips is better suited to handle algorithmic uncertainty. Moreover, the robot market is currently too small; for chip vendors, customizing chips specifically for robots makes profitability difficult.
Yet, dissenting voices exist.
CAS Wireless Semiconductor has launched a cerebellum ASIC chip based on an analog domain architecture. By embedding unique Analog Compute Units (ACU) and Analog Calculus Processing Units (A-IPU), it shifts the core, most time-consuming tasks of the FOC algorithm from traditional digital processing to real-time, parallel analog computation. This architectural innovation achieves a quantum leap in hardware processing latency for key control commands, reducing from 2.8 nanoseconds to 0.2 nanoseconds.
Semidrive also released a full-stack embodied AI solution at the Beijing Auto Show, covering "brain-cerebellum-torso-joints." The new R1 series acts as the robot's "computing brain," providing AI inference capabilities. The D9-Max SoC serves as the "smart control cerebellum," supporting the EtherCAT real-time communication protocol to offer low-latency master control for robot motion. Meanwhile, MCU products empower distributed applications like LiDAR, machine vision, dexterous hands, and joint modules.
Image Source: Semidrive
The divergence between "dedicated" and "general-purpose" boils down to a judgment on the speed of algorithm convergence.
If algorithm frameworks like VLA and world models unify within the next 3 to 5 years, the ROI on dedicated chips will rise significantly. If algorithms continue to iterate rapidly, the flexibility of general-purpose platforms combined with heterogeneous computing becomes more attractive. Both paths have their industrial logic, and a definitive judgment on superiority is not yet possible.
"Brain" vs. "Cerebellum": Two Chips, Two Industrial Logics
Examining the "brain" and "cerebellum" separately helps clarify the true landscape of the embodied AI chip industry.
On the "brain" side, NVIDIA has effectively established a full-stack ecosystem spanning hardware, development frameworks, and simulation platforms.
The Halos for Robotics system, launched in June 2026, goes a step further by bundling chips, operating systems, and safety certification, with 43 companies already participating. For robot manufacturers, adopting NVIDIA's solution means shorter development cycles and lower technical risk.
But this dominance is not unassailable.
"NVIDIA's moat lies in its software ecosystem, but that ecosystem isn't as entrenched in robotics as it is in the AI training market," one chip analyst noted. "The migration cost for robot developers to switch toolchains is far lower than for cloud service providers switching training frameworks."
Qualcomm is expanding from smart cockpits to robot chips. Its Yuelong IQ10 series supports 12 camera inputs and 700 TOPS of compute, with customer relationships built in the automotive supply chain serving as a key asset. Black Sesame is expanding laterally from autonomous driving chips to embodied AI, entering the "brain" race with the A2000X's 1,000 TOPS, benefiting from the high similarity in perception layers between cars and robots.
Compared to NVIDIA's dominance on the "brain" side, progress in domestic production on the "cerebellum" side is more pronounced.
Since "cerebellum" chips are closer to traditional MCUs (microcontrollers) and specialized signal processors in technical terms, they rely less on advanced manufacturing processes. This allows domestic manufacturers to leverage their accumulated expertise in mature nodes.
Sun Mingle, CTO of Semidrive, stated in an interview: "High-performance computing, reliability in extreme environments, nanosecond-level real-time response, multi-bus communication, functional and information safety, and long-term supply assurance." The high match across these six dimensions makes automotive-grade chips an ideal technological foundation for embodied AI.
This April, CAS Wireless Semiconductor released the CT-21X series, China's first dedicated GaN magnetic encoding chip for humanoid robots, achieving domestic production for underlying limb control chips.
The competitive logic of this niche track differs entirely from "brain" chips. It doesn't chase peak compute, but rather stability and energy efficiency when paired with specific actuators.
"Cerebellum chips are characterized by high volume, broad application, and high customer stickiness," one industry insider analyzed. "Every joint needs a control chip, and a humanoid robot might need dozens. Once adapted, the replacement cost is extremely high. This is perfect territory for specialized, innovative semiconductor firms."
In-House vs. General-Purpose: The Logic and Boundaries of OEMs Moving Upstream
Meanwhile, Gasgoo noticed that two news items in June pushed "in-house chips" into the spotlight: UBTECH and Maxxiri formed a joint venture, Xixuan Chuangzhi, planning tape-out in the second half of 2027 and mass production in 2028; Li Auto released its self-developed Mahe M100 chip, explicitly positioning the car as an "embodied AI terminal."
Both events point to a single trend: OEMs are attempting to seize the right to define their own chips.
The drivers for in-house chips are clear. Zhou Jian, chairman of UBTECH, stated publicly, "The current humanoid robot industry relies on foreign general-purpose chips, which not only keeps costs high but also fails to match performance to scenario needs. Foreign chips and materials for robots are expensive, basically accounting for one-third of the BOM cost."
He believes that chips currently used in the industry are not optimized for robots, making it hard to meet embodied AI requirements—a disadvantage for the domestic industry's long-term development.
As humanoid robot production scales, the proportion of chip costs in the total BOM will become more prominent, making in-house development a necessary path to control expenses.
Supply chain security is another consideration. With U.S. semiconductor export controls to China escalating over recent years, edge-side inference chips haven't been the primary target yet, but geopolitical uncertainty is enough to push OEMs to develop alternatives in advance.
But the challenges of in-house chips are equally formidable.
Technically, the industry is focused on whether there is a gap between Maxxiri's GPU architecture and the needs of robot edge chips. The feasibility of "scaling a data center architecture down to the edge" has no precedent in the industry to verify.
In terms of timing, Xixuan Chuangzhi plans to go from founding to tape-out in about two years. In the chip industry, that pace is aggressive.
From a business model perspective, whether costs can be amortized through sales volume is a practical economic question.
In-house development is not the only option; collaboration and platformization offer alternative paths.
The joint venture model between Maxxiri and UBTECH is itself a compromise—neither pure outsourcing nor independent chip making by the OEM. This structure shares risk while also sharing rights to scenario definition.
Third-party chip vendors like Digua Robot and Semidrive advocate a "platformization" route, providing standardized computing foundations that allow OEMs to build differentiation on top.
Three routes—in-house, joint venture, and outsourcing plus platformization—all have strong players backing them. Which proves superior depends on each company's comprehensive judgment of its scenario scale, technical accumulation, and financial strength.
Industry Outlook: Three Main Threads and One Judgment
Over the longer cycle, the evolution of the embodied AI chip industry will unfold along three main threads.
The first is the interplay between algorithm convergence and hardware standardization. Technical paths like VLA and world models are not yet unified, dictating that general platforms will remain the mainstream choice. But as algorithm frameworks gradually converge, market space for dedicated chips will open up. The speed of this process directly influences the strategic choices of all players.
The second is balancing supply chain security with market efficiency. There is tension between the policy push for domestic substitution and the realistic constraints of commercial viability. Over-relying on the domestic substitution narrative while ignoring product competitiveness could lead to resource misallocation; total reliance on overseas suppliers invites geopolitical risk. Finding the equilibrium between the two tests the wisdom of enterprises and investors.
The third is the boundary of OEMs extending upstream. The sustainability of in-house chips depends on whether scale effects can cover R&D costs, whether chip teams can keep pace with algorithm iteration, and whether internal customers (the OEM business) can provide sufficient demand volume. All three conditions are indispensable.
Overall, embodied AI chips are still in an early stage of development. There is far from a consensus on the technical paths of "brain" vs. "cerebellum," the business models of "in-house" vs. "general-purpose," or the prioritization of "compute" vs. "real-time."
This diverse exploration is a necessary phase for healthy industry development. Competition and trial-and-error among different paths will eventually filter out the solutions best suited to market demand.
Who can find the optimal solution under the triangular constraint of "power-compute-real-time"? Who can maintain architectural flexibility amidst rapid algorithm iteration? Who can build a sustainable business model in a market that is still small?
The answers to these questions will gradually become clear over the next three to five years.
On the track of embodied AI chips, the finish line is still a long way off. And right now, the starting gun has just been fired.
